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Optimize sm2p256v1 curve for Intel processors

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This update is part of the GmSSL Turbo project.
This work is supported by the National Key Research and Development
Program of China NO.2018YFB0803601 and Intel.
This commit is contained in:
Zhi Guan
2018-09-07 08:55:36 +08:00
parent 940c98d5d7
commit 4b17502fdd
11 changed files with 14500 additions and 575 deletions
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4
Configurations/00-base-templates.conf
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@@ -138,7 +138,7 @@
template => 1,
cpuid_asm_src => "x86cpuid.s",
bn_asm_src => "bn-586.s co-586.s x86-mont.s x86-gf2m.s",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86.s",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86.s ecp_sm2z256.c ecp_sm2z256-x86.s",
des_asm_src => "des-586.s crypt586.s",
aes_asm_src => "aes-586.s vpaes-x86.s aesni-x86.s",
bf_asm_src => "bf-586.s",
@@ -165,7 +165,7 @@
template => 1,
cpuid_asm_src => "x86_64cpuid.s",
bn_asm_src => "asm/x86_64-gcc.c x86_64-mont.s x86_64-mont5.s x86_64-gf2m.s rsaz_exp.c rsaz-x86_64.s rsaz-avx2.s",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86_64.s",
ec_asm_src => "ecp_nistz256.c ecp_nistz256-x86_64.s ecp_sm2z256.c ecp_sm2z256-x86_64.s",
aes_asm_src => "aes-x86_64.s vpaes-x86_64.s bsaes-x86_64.s aesni-x86_64.s aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s",
md5_asm_src => "md5-x86_64.s",
sha1_asm_src => "sha1-x86_64.s sha256-x86_64.s sha512-x86_64.s sha1-mb-x86_64.s sha256-mb-x86_64.s",