mirror of
https://github.com/guanzhi/GmSSL.git
synced 2026-05-12 19:36:27 +08:00
453 lines
8.0 KiB
ArmAsm
453 lines
8.0 KiB
ArmAsm
.file "asm/x86-mont.s"
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.text
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.globl _bn_mul_mont
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.align 4
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_bn_mul_mont:
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L_bn_mul_mont_begin:
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pushl %ebp
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pushl %ebx
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pushl %esi
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pushl %edi
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xorl %eax,%eax
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movl 40(%esp),%edi
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cmpl $4,%edi
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jl L000just_leave
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leal 20(%esp),%esi
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leal 24(%esp),%edx
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movl %esp,%ebp
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addl $2,%edi
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negl %edi
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leal -32(%esp,%edi,4),%esp
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negl %edi
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movl %esp,%eax
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subl %edx,%eax
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andl $2047,%eax
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subl %eax,%esp
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xorl %esp,%edx
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andl $2048,%edx
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xorl $2048,%edx
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subl %edx,%esp
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andl $-64,%esp
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movl (%esi),%eax
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movl 4(%esi),%ebx
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movl 8(%esi),%ecx
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movl 12(%esi),%edx
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movl 16(%esi),%esi
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movl (%esi),%esi
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movl %eax,4(%esp)
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movl %ebx,8(%esp)
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movl %ecx,12(%esp)
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movl %edx,16(%esp)
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movl %esi,20(%esp)
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leal -3(%edi),%ebx
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movl %ebp,24(%esp)
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leal _OPENSSL_ia32cap_P,%eax
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btl $26,(%eax)
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jnc L001non_sse2
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movl $-1,%eax
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movd %eax,%mm7
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movl 8(%esp),%esi
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movl 12(%esp),%edi
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movl 16(%esp),%ebp
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xorl %edx,%edx
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xorl %ecx,%ecx
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movd (%edi),%mm4
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movd (%esi),%mm5
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movd (%ebp),%mm3
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pmuludq %mm4,%mm5
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movq %mm5,%mm2
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movq %mm5,%mm0
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pand %mm7,%mm0
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pmuludq 20(%esp),%mm5
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pmuludq %mm5,%mm3
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paddq %mm0,%mm3
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movd 4(%ebp),%mm1
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movd 4(%esi),%mm0
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psrlq $32,%mm2
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psrlq $32,%mm3
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incl %ecx
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.align 4,0x90
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L0021st:
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pmuludq %mm4,%mm0
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pmuludq %mm5,%mm1
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paddq %mm0,%mm2
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paddq %mm1,%mm3
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movq %mm2,%mm0
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pand %mm7,%mm0
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movd 4(%ebp,%ecx,4),%mm1
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paddq %mm0,%mm3
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movd 4(%esi,%ecx,4),%mm0
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psrlq $32,%mm2
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movd %mm3,28(%esp,%ecx,4)
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psrlq $32,%mm3
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leal 1(%ecx),%ecx
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cmpl %ebx,%ecx
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jl L0021st
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pmuludq %mm4,%mm0
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pmuludq %mm5,%mm1
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paddq %mm0,%mm2
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paddq %mm1,%mm3
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movq %mm2,%mm0
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pand %mm7,%mm0
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paddq %mm0,%mm3
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movd %mm3,28(%esp,%ecx,4)
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psrlq $32,%mm2
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psrlq $32,%mm3
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paddq %mm2,%mm3
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movq %mm3,32(%esp,%ebx,4)
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incl %edx
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L003outer:
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xorl %ecx,%ecx
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movd (%edi,%edx,4),%mm4
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movd (%esi),%mm5
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movd 32(%esp),%mm6
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movd (%ebp),%mm3
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pmuludq %mm4,%mm5
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paddq %mm6,%mm5
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movq %mm5,%mm0
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movq %mm5,%mm2
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pand %mm7,%mm0
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pmuludq 20(%esp),%mm5
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pmuludq %mm5,%mm3
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paddq %mm0,%mm3
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movd 36(%esp),%mm6
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movd 4(%ebp),%mm1
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movd 4(%esi),%mm0
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psrlq $32,%mm2
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psrlq $32,%mm3
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paddq %mm6,%mm2
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incl %ecx
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decl %ebx
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L004inner:
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pmuludq %mm4,%mm0
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pmuludq %mm5,%mm1
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paddq %mm0,%mm2
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paddq %mm1,%mm3
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movq %mm2,%mm0
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movd 36(%esp,%ecx,4),%mm6
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pand %mm7,%mm0
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movd 4(%ebp,%ecx,4),%mm1
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paddq %mm0,%mm3
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movd 4(%esi,%ecx,4),%mm0
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psrlq $32,%mm2
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movd %mm3,28(%esp,%ecx,4)
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psrlq $32,%mm3
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paddq %mm6,%mm2
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decl %ebx
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leal 1(%ecx),%ecx
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jnz L004inner
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movl %ecx,%ebx
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pmuludq %mm4,%mm0
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pmuludq %mm5,%mm1
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paddq %mm0,%mm2
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paddq %mm1,%mm3
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movq %mm2,%mm0
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pand %mm7,%mm0
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paddq %mm0,%mm3
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movd %mm3,28(%esp,%ecx,4)
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psrlq $32,%mm2
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psrlq $32,%mm3
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movd 36(%esp,%ebx,4),%mm6
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paddq %mm2,%mm3
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paddq %mm6,%mm3
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movq %mm3,32(%esp,%ebx,4)
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leal 1(%edx),%edx
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cmpl %ebx,%edx
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jle L003outer
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emms
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jmp L005common_tail
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.align 4,0x90
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L001non_sse2:
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movl 8(%esp),%esi
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leal 1(%ebx),%ebp
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movl 12(%esp),%edi
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xorl %ecx,%ecx
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movl %esi,%edx
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andl $1,%ebp
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subl %edi,%edx
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leal 4(%edi,%ebx,4),%eax
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orl %edx,%ebp
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movl (%edi),%edi
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jz L006bn_sqr_mont
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movl %eax,28(%esp)
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movl (%esi),%eax
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xorl %edx,%edx
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.align 4,0x90
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L007mull:
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movl %edx,%ebp
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mull %edi
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addl %eax,%ebp
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leal 1(%ecx),%ecx
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adcl $0,%edx
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movl (%esi,%ecx,4),%eax
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cmpl %ebx,%ecx
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movl %ebp,28(%esp,%ecx,4)
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jl L007mull
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movl %edx,%ebp
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mull %edi
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movl 20(%esp),%edi
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addl %ebp,%eax
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movl 16(%esp),%esi
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adcl $0,%edx
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imull 32(%esp),%edi
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movl %eax,32(%esp,%ebx,4)
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xorl %ecx,%ecx
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movl %edx,36(%esp,%ebx,4)
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movl %ecx,40(%esp,%ebx,4)
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movl (%esi),%eax
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mull %edi
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addl 32(%esp),%eax
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movl 4(%esi),%eax
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adcl $0,%edx
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incl %ecx
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jmp L0082ndmadd
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.align 4,0x90
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L0091stmadd:
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movl %edx,%ebp
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mull %edi
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addl 32(%esp,%ecx,4),%ebp
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leal 1(%ecx),%ecx
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adcl $0,%edx
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addl %eax,%ebp
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movl (%esi,%ecx,4),%eax
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adcl $0,%edx
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cmpl %ebx,%ecx
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movl %ebp,28(%esp,%ecx,4)
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jl L0091stmadd
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movl %edx,%ebp
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mull %edi
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addl 32(%esp,%ebx,4),%eax
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movl 20(%esp),%edi
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adcl $0,%edx
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movl 16(%esp),%esi
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addl %eax,%ebp
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adcl $0,%edx
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imull 32(%esp),%edi
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xorl %ecx,%ecx
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addl 36(%esp,%ebx,4),%edx
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movl %ebp,32(%esp,%ebx,4)
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adcl $0,%ecx
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movl (%esi),%eax
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movl %edx,36(%esp,%ebx,4)
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movl %ecx,40(%esp,%ebx,4)
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mull %edi
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addl 32(%esp),%eax
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movl 4(%esi),%eax
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adcl $0,%edx
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movl $1,%ecx
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.align 4,0x90
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L0082ndmadd:
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movl %edx,%ebp
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mull %edi
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addl 32(%esp,%ecx,4),%ebp
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leal 1(%ecx),%ecx
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adcl $0,%edx
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addl %eax,%ebp
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movl (%esi,%ecx,4),%eax
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adcl $0,%edx
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cmpl %ebx,%ecx
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movl %ebp,24(%esp,%ecx,4)
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jl L0082ndmadd
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movl %edx,%ebp
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mull %edi
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addl 32(%esp,%ebx,4),%ebp
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adcl $0,%edx
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addl %eax,%ebp
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adcl $0,%edx
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movl %ebp,28(%esp,%ebx,4)
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xorl %eax,%eax
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movl 12(%esp),%ecx
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addl 36(%esp,%ebx,4),%edx
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adcl 40(%esp,%ebx,4),%eax
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leal 4(%ecx),%ecx
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movl %edx,32(%esp,%ebx,4)
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cmpl 28(%esp),%ecx
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movl %eax,36(%esp,%ebx,4)
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je L005common_tail
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movl (%ecx),%edi
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movl 8(%esp),%esi
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movl %ecx,12(%esp)
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xorl %ecx,%ecx
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xorl %edx,%edx
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movl (%esi),%eax
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jmp L0091stmadd
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.align 4,0x90
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L006bn_sqr_mont:
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movl %ebx,(%esp)
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movl %ecx,12(%esp)
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movl %edi,%eax
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mull %edi
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movl %eax,32(%esp)
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movl %edx,%ebx
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shrl $1,%edx
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andl $1,%ebx
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incl %ecx
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.align 4,0x90
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L010sqr:
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movl (%esi,%ecx,4),%eax
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movl %edx,%ebp
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mull %edi
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addl %ebp,%eax
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leal 1(%ecx),%ecx
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adcl $0,%edx
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leal (%ebx,%eax,2),%ebp
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shrl $31,%eax
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cmpl (%esp),%ecx
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movl %eax,%ebx
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movl %ebp,28(%esp,%ecx,4)
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jl L010sqr
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movl (%esi,%ecx,4),%eax
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movl %edx,%ebp
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mull %edi
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addl %ebp,%eax
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movl 20(%esp),%edi
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adcl $0,%edx
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movl 16(%esp),%esi
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leal (%ebx,%eax,2),%ebp
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imull 32(%esp),%edi
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shrl $31,%eax
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movl %ebp,32(%esp,%ecx,4)
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leal (%eax,%edx,2),%ebp
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movl (%esi),%eax
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shrl $31,%edx
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movl %ebp,36(%esp,%ecx,4)
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movl %edx,40(%esp,%ecx,4)
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mull %edi
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addl 32(%esp),%eax
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movl %ecx,%ebx
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adcl $0,%edx
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movl 4(%esi),%eax
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movl $1,%ecx
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.align 4,0x90
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L0113rdmadd:
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movl %edx,%ebp
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mull %edi
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addl 32(%esp,%ecx,4),%ebp
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adcl $0,%edx
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addl %eax,%ebp
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movl 4(%esi,%ecx,4),%eax
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adcl $0,%edx
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movl %ebp,28(%esp,%ecx,4)
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movl %edx,%ebp
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mull %edi
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addl 36(%esp,%ecx,4),%ebp
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leal 2(%ecx),%ecx
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adcl $0,%edx
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addl %eax,%ebp
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movl (%esi,%ecx,4),%eax
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adcl $0,%edx
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cmpl %ebx,%ecx
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movl %ebp,24(%esp,%ecx,4)
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jl L0113rdmadd
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movl %edx,%ebp
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mull %edi
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addl 32(%esp,%ebx,4),%ebp
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adcl $0,%edx
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addl %eax,%ebp
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adcl $0,%edx
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movl %ebp,28(%esp,%ebx,4)
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movl 12(%esp),%ecx
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xorl %eax,%eax
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movl 8(%esp),%esi
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addl 36(%esp,%ebx,4),%edx
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adcl 40(%esp,%ebx,4),%eax
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movl %edx,32(%esp,%ebx,4)
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cmpl %ebx,%ecx
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movl %eax,36(%esp,%ebx,4)
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je L005common_tail
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movl 4(%esi,%ecx,4),%edi
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leal 1(%ecx),%ecx
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movl %edi,%eax
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movl %ecx,12(%esp)
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mull %edi
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addl 32(%esp,%ecx,4),%eax
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adcl $0,%edx
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movl %eax,32(%esp,%ecx,4)
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xorl %ebp,%ebp
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cmpl %ebx,%ecx
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leal 1(%ecx),%ecx
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je L012sqrlast
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movl %edx,%ebx
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shrl $1,%edx
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andl $1,%ebx
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.align 4,0x90
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L013sqradd:
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movl (%esi,%ecx,4),%eax
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movl %edx,%ebp
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mull %edi
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addl %ebp,%eax
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leal (%eax,%eax,1),%ebp
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adcl $0,%edx
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shrl $31,%eax
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addl 32(%esp,%ecx,4),%ebp
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leal 1(%ecx),%ecx
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adcl $0,%eax
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addl %ebx,%ebp
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adcl $0,%eax
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cmpl (%esp),%ecx
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movl %ebp,28(%esp,%ecx,4)
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movl %eax,%ebx
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jle L013sqradd
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movl %edx,%ebp
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leal (%ebx,%edx,2),%edx
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shrl $31,%ebp
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L012sqrlast:
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movl 20(%esp),%edi
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movl 16(%esp),%esi
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imull 32(%esp),%edi
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addl 32(%esp,%ecx,4),%edx
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movl (%esi),%eax
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adcl $0,%ebp
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movl %edx,32(%esp,%ecx,4)
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movl %ebp,36(%esp,%ecx,4)
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mull %edi
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addl 32(%esp),%eax
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leal -1(%ecx),%ebx
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adcl $0,%edx
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movl $1,%ecx
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movl 4(%esi),%eax
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jmp L0113rdmadd
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.align 4,0x90
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L005common_tail:
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movl 16(%esp),%ebp
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movl 4(%esp),%edi
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leal 32(%esp),%esi
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movl (%esi),%eax
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movl %ebx,%ecx
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xorl %edx,%edx
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.align 4,0x90
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L014sub:
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sbbl (%ebp,%edx,4),%eax
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movl %eax,(%edi,%edx,4)
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decl %ecx
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movl 4(%esi,%edx,4),%eax
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leal 1(%edx),%edx
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jge L014sub
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sbbl $0,%eax
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andl %eax,%esi
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notl %eax
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movl %edi,%ebp
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andl %eax,%ebp
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orl %ebp,%esi
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.align 4,0x90
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L015copy:
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movl (%esi,%ebx,4),%eax
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movl %eax,(%edi,%ebx,4)
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movl %ecx,32(%esp,%ebx,4)
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decl %ebx
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jge L015copy
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movl 24(%esp),%esp
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movl $1,%eax
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L000just_leave:
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popl %edi
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popl %esi
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popl %ebx
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popl %ebp
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ret
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.byte 77,111,110,116,103,111,109,101,114,121,32,77,117,108,116,105
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.byte 112,108,105,99,97,116,105,111,110,32,102,111,114,32,120,56
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.byte 54,44,32,67,82,89,80,84,79,71,65,77,83,32,98,121
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.byte 32,60,97,112,112,114,111,64,111,112,101,110,115,115,108,46
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.byte 111,114,103,62,0
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.comm _OPENSSL_ia32cap_P,4
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